Semiconductor wafer manufacturers generally use a heating lamp or hot plate module for thermal process activation and depositing various f ilms on semiconductor wafers. Film deposition processes such as chemical-vapor deposition (CVD) are used for formation of epitaxial semiconductor layers, dielectrics (e.g., silicon nitride, silicon oxide, or oxynitrides) , metals (e.g., tungsten) , polycrystalline silicon, and doped oxides. These processes may use suitable reaction gases with thermal and/or plasmas activation.
A lamp-heated system for semiconductor wafer processing generally includes a lamp heat source separated by an optically transparent material such as the quartz window from a vacuum process chamber where the wafer resides. The quartz optical/vacuum window provides a transmission path for the lamp optical energy while maintaining a vacuum and/or a controlled environment in the process chamber. The quartz window is usually transparent to infrared radiation up to a wavelength of approximately 3.5 .mu.m. Plasma arc lamps typically produce most of their output optical energy in the visible and ultraviolet range, while tungsten halogen lamps usually produce energy in the near infrared range (e.g., 0.7 to 3.5 .mu.m). These wavelengths are essentially within the transmission wavelength range for quartz, so direct lamp energy radiation typically does not significantly heat the window. However, the vacuum/optical quartz window can be significantly heated by the radiative and convective heat losses from the heated wafer.
Within most processing reactor chambers, the wafer sits on low thermal mass pins at a small distance from the quartz window during processing. The wafer is directly heated from the backside (assuming face-down processing) by the lamp energy that passes through the optical/vacuum quartz window. While it is heated the wafer radiates thermal energy. That energy dissipated by radiative and convective losses can heat up different parts of the reactor, including the optical/vacuum quartz window. In particular, when the wafer radiates this energy, the radiative energy wavelength may extend much beyond 3.5 .mu.m. This is beyond the transmission wavelength range of the quartz optical/vacuum window. As a result, the window (usually 0.5" thick) absorbs a relatively large fraction of the radiant heat energy dissipated from the semiconductor wafer. The quartz window usually has a large thermal mass due to its high heat capacity, large window thickness, and poor thermal conductivity.
As the quartz window becomes heated during semiconductor wafer processing, not only does layer deposition takes place on the wafer, but also deposits are formed on the inner surface of the heated quartz window. For high-temperature processes such as single-wafer epitaxy, the heated wafer (with a temperature of 850.degree.-1100.degree. C.) can heat up the quartz window to temperatures as high as over 500.degree. C.
As soon as deposits (e.g. silicon deposition during epitaxial growth) start to form on the window, the quartz window becomes less transparent and absorbs more thermal energy from the lamp. This results in further heating of the window and formation of thicker deposits on the window. Moreover, when operating a constant lamp power output, a runaway situation may occur. As the quartz window absorbs more energy directly from the lamp, window heating becomes worse, and more deposits may be formed on the window. Ultimately, good process uniformity and process reliability become unattainable. Window deposits can degrade deposition process uniformity on wafer and also cause wafer temperature measurement errors. They can also increase particle generation in the process environment.
There are two known ways to correct these problems. The first is to perform a labor-intensive and time consuming wet chemical cleaning procedure on the coated window after a few process runs. This requires disassembling the process chamber and degrades equipment up-time. Alternatively, a manufacturer may actually perform in-situ dry cleaning process using a plasma or other activated cleaning gas in the chamber after the process terminates. This procedure, however, may degrade the window surface quality in some applications. The in-situ cleaning process may have to be performed after each wafer processing run, resulting in reduced overall wafer processing throughput.
Another problem in many semiconductor wafer processing applications relates to known methods for depositing different material layers using techniques such as chemical-vapor deposition. Systems that use low-thermal mass pins to support the wafer deposit material everywhere on the wafer, including its backside, because the heated wafer is totally immersed and exposed in the reactive process environment. For different deposition applications, a manufacturer may desire to deposit the film only on the front of the wafer and to prevent wafer backside deposition. Preventing material deposition on the semiconductor wafer backside usually simplifies the overall semiconductor device fabrication sequence.
One approach to prevent backside deposition is to clamp the wafer directly against the quartz window. This prevents active gases from getting on the wafer back side, but clamping the wafer to the quartz window eliminates the low thermal mass advantage of having the semiconductor wafer sit on the pins and heated by optical radiation. The clamping approach also reduces the maximum heat-up and cool-down rates which can be achieved. As opposed to a thin semiconductor wafer, the quartz window has a large thermal mass because it is a poor thermal conductor and is approximately 8-10" in diameter and 1/2" thick. If the wafer (e.g. 6" wafer) is clamped to the window, it becomes an integral part of the large thermal mass of the quartz window. Additionally, in this method the wafer directly contacts the window and dissipates heat both by direct conductive losses into the quartz window and radiative losses. As a result, the fast thermal cycling and rapid thermal processing features will be lost by the clamping method.
Thus, there is the need for a method and apparatus that eliminate the problem of unwanted wafer backside deposition without the use of a wafer clamping mechanism which can further heat the process chamber quartz window. There is the need for a method and apparatus that eliminate wafer backside deposition without coupling the wafer thermal mass to the quartz window thermal mass.
Another problem with conventional systems is that in many deposition processes, the reactive process gas and/or plasma environment interacts with the process chamber walls. If the process chamber walls are metallic, the interaction with metallic substances may contaminate the process environment and wafer surface. Even if it is possible to perform in-situ cleaning of the chamber after deposition, the cleaning process may remove metallic impurities from the wall. In subsequent runs, this may cause equipment-induced cross-contamination on the wafers.
The chamber and window deposition problems make it necessary to periodically clean the process chamber to remove deposits from the process chamber and quartz window walls. Some systems accommodate in-situ cleaning, for instance, after each wafer run or after a known number of wafer runs. In such a process, the operator introduces a special chemical cleaning gas which may or may not be activated by a plasma. In this type of process, the in-situ cleaning chemistry interacts everywhere in the chamber and etches off the film deposits on the chamber window and walls. Cleaning may, however, adversely interact with the surface area of the metal chamber and allow metallic impurities to more easily leave the process chamber walls to contaminate the wafer. This cross-contamination problem makes it necessary to optimize the in-situ cleaning process such that it does not attack the metallic components in the process chamber.
Thus, there is a need f or a method and system that reduces or eliminates the potential for process and wafer cross-contamination.
There is the need for a method and apparatus that eliminates or substantially reduces the need f or process chamber wall cleaning to thereby minimize equipment-induced contamination of wafers during device processing.